| Chapter title | From BSP to a virtual von Neumann machine |
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| Authors | Kalantery, N., Winter, S. and Wilson, D.R. |
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| Editors | Halatsis, C., Maritsas, D., Philokyprou, G. and Theodoridis, S. |
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| Abstract | Bulk synchronous parallel architecture incorporates a scalable and transparent communication model. The task-level synchronization mechanism of the machine, however, is not transparent to the user and can be inefficient when applied to the coordination of irregular parallelism. This paper presents a brief introduction to an alternative memory-level scheme which offers the prospect of achieving both efficient and transparent synchronization. This scheme, based on a discrete event simulation paradigm, supports sequential style of programming and, coupled with the BSP communication model, leads to the emergence of a virtual von Neumann parallel computer. |
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| Book title | PARLE'94 Parallel Architectures and Languages Europe: 6th International PARLE Conference Athens, Greece, July 4–8, 1994, Proceedings |
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| Year | 1995 |
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| Publisher | Springer |
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| Publication dates |
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| Published | 1995 |
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| Series | Lecture notes in computer science |
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| ISBN | 3540581847 |
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| Digital Object Identifier (DOI) | https://doi.org/10.1007/3-540-58184-7_157 |
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| Journal citation | (817), pp. 785-788 |
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