PTVL - DCDI

Department | Design, Creative and Digital Industries |
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Research group | Applied DSP and VLSI |

Modeling of switched-capacitor delta-sigma Modulators in SIMULINK

Zare-Hoseini, H., Kale, I. and Shoaei, O. 2005. Modeling of switched-capacitor delta-sigma Modulators in SIMULINK. *IEEE Transactions on Instrumentation and Measurement.* 54 (4), pp. 1646-1654. doi:10.1109/TIM.2005.851085

A new structure for capacitor-mismatch-insensitive multiply-by-two amplification

Zare-Hoseini, H., Shoaei, O. and Kale, I. 2006. A new structure for capacitor-mismatch-insensitive multiply-by-two amplification. in: 2006 IEEE International Symposium on Circuits and Systems. ISCAS 2006. Proceedings. Los Alamitos, USA IEEE . pp. 4879-4882

Continuous time delta sigma modulators with reduced clock jitter sensitivity

Zare-Hoseini, H. and Kale, I. 2006. Continuous time delta sigma modulators with reduced clock jitter sensitivity. in: 2006 IEEE International Symposium on Circuits and Systems. ISCAS 2006. Proceedings. Los Alamitos, USA IEEE . pp. 5371-5374

Highly linear transconductance topology using floating transistors

Zare-Hoseini, H., Kale, I. and Morling, R.C.S. 2006. Highly linear transconductance topology using floating transistors. *Electronics Letters.* 42 (1), pp. 2-4. doi:10.1049/el:20063846

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