Asynchrobatic logic for low-power VLSI design

Willingham, D.J. 2010. Asynchrobatic logic for low-power VLSI design. PhD thesis University of Westminster School of Electronics and Computer Science

TitleAsynchrobatic logic for low-power VLSI design
TypePhD thesis
AuthorsWillingham, D.J.
Abstract

In this work, Asynchrobatic Logic is presented. It is a novel low-power

design style that combines the energy saving benefits of asynchronous logic

and adiabatic logic to produce systems whose power dissipation is reduced in

several different ways. The term “Asynchrobatic” is a new word that can be

used to describe these types of systems, and is derived from the

concatenation and shortening of Asynchronous, Adiabatic Logic. This thesis

introduces the concept and theory behind Asynchrobatic Logic. It first

provides an introductory background to both underlying parent technologies

(asynchronous logic and adiabatic logic). The background material continues

with an explanation of a number of possible methods for designing complex

data-path cells used in the adiabatic data-path. Asynchrobatic Logic is then

introduced as a comparison between asynchronous and Asynchrobatic buffer

chains, showing that for wide systems, it operates more efficiently. Two

more-complex sub-systems are presented, firstly a layout implementation of

the substitution boxes from the Twofish encryption algorithm, and secondly a

front-end only (without parasitic capacitances, resistances) simulation that

demonstrates a functional system capable of calculating the Greatest

Common Denominator (GCD) of a pair of 16-bit unsigned integers, which

under typical conditions on a 0.35μm process, executed a test vector requiring

twenty-four iterations in 2.067μs with a power consumption of 3.257nW.

These examples show that the concept of Asynchrobatic Logic has the

potential to be used in real-world applications, and is not just theory without

application. At the time of its first publication in 2004, Asynchrobatic Logic

was both unique and ground-breaking, as this was the first time that

consideration had been given to operating large-scale adiabatic logic in an

asynchronous fashion, and the first time that Asynchronous Stepwise

Charging (ASWC) had been used to drive an adiabatic data-path.

Year2010
FileDavid_John_WILLINGHAM_ADDED.pdf
Publication dates
Completed2010

Related outputs

A system for calculating the greatest common denominator implemented using asynchrobatic logic
Willingham, D.J. and Kale, I. 2008. A system for calculating the greatest common denominator implemented using asynchrobatic logic. in: Ellervee, P., Jervan, G. and Nielsen, I.R. (ed.) 26th Norchip Conference, Tallinn, Estonia, 17 - 18 November 2008. Formal proceedings IEEE . pp. 194-197

An asynchrobatic, radix-four, carry look-ahead adder
Willingham, D.J. and Kale, I. 2008. An asynchrobatic, radix-four, carry look-ahead adder. in: PRIME: 2008 PhD Research in Microelectronics and Electronics. Proceedings. Istanbul, Turkey, June 22–25, 2008 IEEE . pp. 105-108

Using positive feedback adiabatic logic to implement reversible Toffoli gates
Willingham, D.J. and Kale, I. 2008. Using positive feedback adiabatic logic to implement reversible Toffoli gates. in: Ellervee, P., Jervan, G. and Nielsen, I.R. (ed.) 26th Norchip Conference, Tallinn, Estonia, 17 - 18 November 2008. Formal proceedings IEEE . pp. 5-8

Permalink - https://westminsterresearch.westminster.ac.uk/item/9087w/asynchrobatic-logic-for-low-power-vlsi-design


Share this
Tweet
Email