Chapter title | Quantitative evaluation of three reconfiguration strategies on FPGAs: a case study |
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Authors | Cadenas, O., Megson, G.M. and Plaks, T.P. |
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Abstract | Reconfigurable computing is becoming an important new alternative for implementing computations. Field programmable gate arrays (FPGAs) are the ideal integrated circuit technology to experiment with the potential benefits of using different strategies of circuit specialization by reconfiguration. The final form of the reconfiguration strategy is often non-trivial to determine. Consequently, in this paper, we examine strategies for reconfiguration and, based on our experience, propose general guidelines for the tradeoffs using an area-time metric called functional density. Three experiments are set up to explore different reconfiguration strategies for FPGAs applied to a systolic implementation of a scalar quantizer used as a case study. Quantitative results for each experiment are given. The regular nature of the example means that the results can be generalized to a wide class of industry-relevant problems based on arrays. |
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Keywords | Field programmable gate arrays, reconfigurable architectures, systolic arrays, FPGA reconfiguration strategies, area-time metric, arrays, case study, circuit specialization, field programmable gate arrays, functional density, industry-relevant problems, integrated circuit technology, quantitative evaluation, reconfigurable computing, scalar quantizer, systolic implementation, tradeoffs |
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Book title | The fourth international conference/exhibition on high performance computing in the Asia-Pacific region |
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Year | 2000 |
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Publisher | IEEE |
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Publication dates |
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Published | 2000 |
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ISBN | 0769505892 |
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Digital Object Identifier (DOI) | https://doi.org/10.1109/HPC.2000.846574 |
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Journal citation | 1, pp. 337-342 |
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