Chapter title | Synthesis of a systolic array genetic algorithm |
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Authors | Megson, G.M. and Bland, I.M. |
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Abstract | The paper presents the design of a hardware genetic algorithm which uses a pipeline of systolic arrays. Demonstrated is the design methodology where a simple genetic algorithm expressed in C source code is progressively re-written into a recurrence form from which systolic structures can be deduced. The paper extends previous work by the authors by introducing a simplification to a previous systolic design. |
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Keywords | Genetic algorithms, pipeline processing, systolic arrays, C source code, hardware genetic algorithm design, progressive rewriting, recurrence form, systolic array genetic algorithm synthesis, systolic array pipeline systolic structures |
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Book title | Proceedings of the first merged International Parallel Processing Symposium & Symposium on Parallel and Distributed Processing, March 30-April 3, 1998, Orlando, Florida |
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Page range | 316-320 |
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Year | 1998 |
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Publisher | IEEE |
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Place of publication | Los Alamitos, USA |
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ISBN | 0818684046 |
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Digital Object Identifier (DOI) | https://doi.org/10.1109/IPPS.1998.669933 |
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