Applied DSP and VLSI

Raghav, H., Bartlett, V. and Kale, I. 2018. Investigating the effectiveness of Without Charge-Sharing Quasi-Adiabatic Logic for energy efficient and secure cryptographic implementations. Microelectronics Journal. 76, pp. 8-21. https://doi.org/10.1016/j.mejo.2018.04.004

Raghav, H., Bartlett, V. and Kale, I. 2016. Investigation of Stepwise Charging Circuits for Power-Clock Generation in Adiabatic Logic. 12th International Conference on Ph.D. Research in Microelectronics and Electronics (PRIME). Portugal, Lisbon 27 - 30 Jun 2017 IEEE . https://doi.org/10.1109/PRIME.2016.7519499

Omana, M., Rossi, D. and Metra, C. 2007. Latch Susceptibility to Transient Faults and New Hardening Approach. IEEE Transactions on Computers. 56 (9), pp. 1255-1268. https://doi.org/10.1109/TC.2007.1070

Rossi, D., Omana, M., Garrammone, G., Metra, C., Jas, A. and Galivanche, R, 2013. Low Cost Concurrent Error Detection Strategy for the Control Logic of High Performance Microprocessors and Its Application to the Instruction Decoder. Journal of Electronic Testing. 29 (3), pp. 401-413. https://doi.org/10.1007/s10836-013-5355-2

Omana, M., Rossi, D., Bosio, N. and Metra, C. 2013. Low Cost NBTI Degradation Detection and Masking Approaches. IEEE Transactions on Computers. 62 (3), pp. 496-509. https://doi.org/10.1109/TC.2011.246

Omana, M., Rossi, D., Beniamino, E., Metra, C., Tirumurti, C. and Galivanche, R. 2016. Low-Cost and High-Reduction Approaches for Power Droop during Launch-On-Shift Scan-Based Logic BIST. IEEE Transactions on Computers. 65 (8), pp. 2484-2494. https://doi.org/10.1109/TC.2015.2490058

Omana, M., Rossi, D., Giaffreda, D., Metra, C., Mak, T.M., Rahman, A. and Tam, S. 2015. Low-Cost On-Chip Clock Jitter Measurement Scheme. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 23 (3), pp. 435-443. https://doi.org/10.1109/TVLSI.2014.2312431

Rossi, D., Omana, M., Giaffreda, D. and Metra, C. 2015. Modeling and Detection of Hotspot in Shaded Photovoltaic Cells. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 23 (6), pp. 1031-1039. https://doi.org/10.1109/TVLSI.2014.2333064

Rossi, D., Cazeaux, J.M., Metra, C. and Lombardi, F. 2007. Modeling Crosstalk Effects in CNT Bus Architectures. IEEE Transactions on Nanotechnology. 6 (2), pp. 133-145. https://doi.org/10.1109/TNANO.2007.891814

Arif, S., Coskun, A. and Kale, I. 2018. Multi-Stage Complex Notch Filtering for Interference Detection and Mitigation to Improve the Acquisition Performance of GPS. 14th Conference on PhD Research in Microelectronics and Electronics (PRIME 2018). Prague, Czech Republic 02 - 05 Jul 2018 IEEE . https://doi.org/10.1109/PRIME.2018.8430324

Eminaga, Y., Coskun, A. and Kale, I. 2017. Multiplier Free Implementation of 8-tap Daubechies Wavelet Filters for Biomedical Applications. IEEE New Generation of Circuits and Systems Conference. Genova, Italy 07 - 09 Sep 2017 IEEE . https://doi.org/10.1109/NGCAS.2017.63

Cetinsel, S., Morling, R.C.S. and Kale, I. 2014. Nonlinear Phase Filtering Effects on GNSS Receiver Positioning Accuracy. 7th ESA Workshop on Satellite Navigation Technologies and European Workshop on GNSS Signals and Signal Processing (NAVITEC). Noordwijk, Netherlands 03 Dec 2014

Cetinsel, S., Coskun, A., Kale, I., Hughes, R., Ernst, C. and Angeletti, P. 2019. On board Processor and Processing Strategies for Next Generation Reconfigurable Satellite Payloads. Recent Advances in Space Technologies (RAST 2019). Turkey 11 - 14 Jun 2019 IEEE . https://doi.org/10.1109/RAST.2019.8767830

Makram Mobarak Sinada, F., Reni, S. and Kale, I. 2022. Parasite Detection Model for Neglected Tropical Disease Diagnosis. 2022 44th Annual International Conference of the IEEE Engineering in Medicine & Biology Society (EMBC). Scottish Event Campus, Glasgow, UK 11 2022 - 15 Jun 2023 IEEE .

Vimalathithan, R., Rossi, D., Omana, M., Metra, C. and Valarmathi, M.L. 2013. Polynomial Based Key Distribution Scheme for WPAN. Malaysian Journal of Mathematical Sciences. 7 (S), pp. 59-72.

Rossi, D., Nieuwland, A.K., Van Dijk, V.E.S., Kleihorst, R.P. and Metra, C. 2008. Power Consumption of Fault Tolerant Busses. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 16 (5), pp. 542-553. https://doi.org/10.1109/TVLSI.2008.917535

Dallet, C., Reni, S. and Kale, I. 2014. Real Time Blood Image Processing Application for Malaria Diagnosis Using Mobile Phones. IEEE International Symposium on Circuits and Systemss, ISCAS 2014. Melbourne, Victoria, Australia 01 Jun 2014 IEEE . https://doi.org/10.1109/ISCAS.2014.6865657

Rossi, D., Tenentes, V., Sheng Yang, Khursheed, S. and Al-Hashimi, B.M. 2016. Reliable Power Gating with NBTI Aging Benefits. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 24 (8), pp. 2735-2744. https://doi.org/10.1109/TVLSI.2016.2519385

Tek, F.B., Cannavo, F., Nunnari, G. and Kale, I. 2014. Robust localization and identification of African clawed frogs in digital images. Ecological Informatics. 23, pp. 3-12. https://doi.org/10.1016/j.ecoinf.2013.09.005

Raghav, H., Bartlett, V. and Kale, I. 2017. Robustness of Power Analysis Attack Resilient Adiabatic Logic: WCS-QuAL under PVT Variations. 27th International Symposium on Power and Timing Modeling, Optimization and Simulation. Thessaloniki, Greece 25 - 27 Sep 2017 IEEE . https://doi.org/10.1109/PATMOS.2017.8106968

Omana, M., Rossi, D., Fuzzi, F., Metra, C., Tirumurti, C. and Galivanche, R. 2017. Scalable Approach for Power Droop Reduction During Scan-Based Logic BIST. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 25 (1), pp. 238-246. https://doi.org/10.1109/TVLSI.2016.2572606

Turgul, V. and Kale, I. 2017. Simulating the Effects of Skin Thickness and Fingerprints to Highlight Problems with Non-invasive RF Blood Glucose Sensing from Fingertips. IEEE Sensors Journal. 17 (22), pp. 7553-7560. https://doi.org/10.1109/JSEN.2017.2757083

Rossi, D., Nieuwland, A.K. and Metra, C. 2008. Simultaneous Switching Noise: The Relation Between Bus Layout and Coding. IEEE Design & Test of Computers. 25 (1), pp. 76-86. https://doi.org/10.1109/MDT.2008.25

Raghav, H., Bartlett, V. and Kale, I. 2018. Symmetric Power Analysis Attack Resilient Adiabatic Logic for Smartcard Applications. 28th International Symposium on Power and Timing Modeling, Optimization and Simulation. Costa Brava, Spain 02 - 04 Jul 2018 IEEE . https://doi.org/10.1109/PATMOS.2018.8463996

Coskun, A., Kale, I., Morling, R.C.S., Hughes, R., Brown, S. and Angeletti, P. 2014. The Design of Low Complexity Low Power Pipelined Short Length Winograd Fourier Transforms. IEEE International Symposium on Circuits and Systems (ISCAS). Melbourne VIC, Australia 01 - 05 Jun 2014 IEEE . https://doi.org/10.1109/ISCAS.2014.6865556

Halak, B., Tenentes, V, and Rossi, D. 2016. The impact of transistor aging on the reliability of level shifters in nano-scale CMOS technology. Microelectronics Reliability. 57 (December), pp. 74-81. https://doi.org/10.1016/j.microrel.2016.10.018

Ercan, C. and Kale, I. 2017. The role of space in the security and defence policy of Turkey. A change in outlook: Security in space versus security from space. Elsevier, Space Policy. 42, pp. 17-25 JSPA1258. https://doi.org/10.1016/j.spacepol.2017.10.004

de Cacqueray-Valmenier, M., Coskun, A. and Kale, I. 2016. The Use of Almost Linear Phase IIR filters In DFT Modulated Filter Banks for Communication Systems . 2016 IEEE 17th International Workshop on Signal Processing Advances in Wireless Communications (SPAWC). Edinburgh 03 - 06 Jul 2016 IEEE . https://doi.org/10.1109/SPAWC.2016.7536754

Talebzadeh, J. and Kale, I. 2015. Time Interleaved Delta Sigma Modulator. WO2015/144771A1

Arif, S., Coskun, A. and Kale, I. 2020. Tracking and Mitigation of Chirp-Type Interference in GPS Receivers Using Adaptive Notch Filters. 2020 IEEE 63rd International Midwest Symposium on Circuits and Systems (MWSCAS). Springfield, MA, USA 09 - 12 Aug 2020 IEEE . https://doi.org/10.1109/MWSCAS48704.2020.9184659

Eminaga, Y., Coskun, A. and Kale, I. 2017. Two-Path All-pass Based Half-Band Infinite Impulse Response Decimation Filters and the Effects of Their Non-Linear Phase Response on ECG Signal Acquisition. Biomedical Signal Processing & Control. 31, pp. 529-538. https://doi.org/10.1016/j.bspc.2016.08.019

Maheshwari, S., Bartlett, V. and Kale, I. 2018. VHDL-based Modelling Approach for the Digital Simulation of 4-phase Adiabatic Logic Design . 28th International Symposium on Power and Timing Modeling, Optimization and Simulation. Costa Brava, Spain 02 - 04 Jul 2018 IEEE . https://doi.org/10.1109/PATMOS.2018.8464140

Metra, C., Rossi, D. and Mak, T.M. 2007. Won’t On-Chip Clock Calibration Guarantee Performance Boost and Product Quality ? IEEE Transactions on Computers . 56 (3), pp. 415-428. https://doi.org/10.1109/TC.2007.53