| Title | Robustness of Power Analysis Attack Resilient Adiabatic Logic: WCS-QuAL under PVT Variations |
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| Authors | Raghav, H., Bartlett, V. and Kale, I. |
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| Type | Conference paper |
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| Abstract | In this paper, we propose Without Charge Sharing Quasi Adiabatic Logic (WCS-QuAL) as a countermeasure against Power Analysis Attacks. We evaluate and compare our logic with the recently proposed secure adiabatic logic designs SPGAL and EE-SPFAL at frequencies ranging from 1MHz to 100MHz. Simulation results show that WCS-QuAL outperforms the existing secure adiabatic logic designs on the basis of % Normalized Energy Deviation (NED) and % Normalized Standard Deviation (NSD) at all simulated frequencies. Also, all 2-input gates using WCS-QuAL dissipate nearly equal energy for all possible input transitions. In addition, the energy dissipated by WCS-QuAL approaches to the energy dissipation of EESPFAL and SPGAL as the output load capacitance is increased above 100fF. To further evaluate and compare the performance, GF (24) bit-parallel multiplier was implemented as a design example. The impact of Process-Voltage-Temperature (PVT) variations, power supply scaling and technology on the performance of the three logic designs was investigated and compared. Simulation results show that WCS-QuAL passed the functionality test against PVT variations and can perform well against the power supply scaling (from 1.8V to 0.5V). It also exhibits the least value of %NED and %NSD against PVT variations and when the power supply is scaled down compared to EE-SPFAL and SPGAL. At lower technology, WCS-QuAL, shows more improvement in energy dissipation than EE-SPFAL. |
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| Keywords | power analysis attacks resilient; secure adiabatic logic; charge sharing; energy consumption; countermeasure |
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| Year | 2017 |
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| Conference | 27th International Symposium on Power and Timing Modeling, Optimization and Simulation |
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| Publisher | IEEE |
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| Accepted author manuscript | |
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| Publication dates |
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| Published | 16 Nov 2017 |
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| Book title | Proceedings of the 27th International Symposium on Power and Timing Modeling, Optimization and Simulation, September 25-27, Aristotle University Research Dissemination Center, Thessaloniki, Greece |
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| ISBN | 9781509064625 |
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| Digital Object Identifier (DOI) | https://doi.org/10.1109/PATMOS.2017.8106968 |
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