Efficient FPGA implementation of an adaptive IQ-imbalance corrector for communication receivers using reduced range multipliers
Cetin, E., Demirsoy, S.S., Kale, I. and Morling, R.C.S. 2005. Efficient FPGA implementation of an adaptive IQ-imbalance corrector for communication receivers using reduced range multipliers. 13th European Signal Processing Conference (EUSIPCO). Antalya, Turkey 04-08 Sep 2005