|Chapter title||Design of a power-aware digital image rejection receiver|
|Authors||Cetin, E., Kale, I. and Morling, R.C.S.|
This paper deals with and details the design of a power-aware adaptive digital image rejection receiver based on blind-source-separation that alleviates the RF analog front-end impairments. Power-aware system design at the RTL level without having to redesign arithmetic circuits is used to reduce the power consumption in nomadic devices. Power-aware multipliers with configurable precision are used to trade-off the image-rejection-ratio (IRR) performance with power consumption. Results of the simulation case studies demonstrate that the IRR performance of the power-aware system is comparable to that of the normal implementation albeit degraded slightly, but well within the acceptable limits.
|Book title||Proceedings of the IEEE International Symposium on Circuits and Systems, 2009 (ISCAS 2009)|
|Digital Object Identifier (DOI)||https://doi.org/10.1109/ISCAS.2009.5117722|