Title | Design of a Delayless Feedback Path Free 2nd-order Two-Path Time-Interleaved Discrete-Time Delta-Sigma Modulator- a New Approach |
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Authors | Talebzadeh, J. and Kale, I. |
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Type | Conference paper |
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Abstract | This paper presents the design procedure for a 2nd_order two-path Discrete-Time Time-Interleaved (DTTI) ΔΣ modulator from a conventional single-loop 2nd-order Discrete-Time (DT) ΔΣ modulator through the use of time domain equations and time-interleaving concepts [1]. The resulting modulator is free from the delayless feedback path and has only one set of integrators. The delayless feedback path issue in Time-Interleaved (TI) ΔΣ modulators is a critical restriction for the implementation of TI ΔΣ modulators and is effectively eliminated through the use of the approach proposed in this paper. The DTTI ΔΣ modulator requires only three op-amps and two quantizers both of which work concurrently, in comparison to the single-loop DT counterpart that also deploys two op-amps. For an OverSampling Ratio (OSR) of 16 and a clock frequency of 640MHz, our simulation results show a maximum Signal-to-Noise Ratio (SNR) for the DTTI ΔΣ modulator to be 70.5dB with an input bandwidth of 20MHz which has 15dB improvement in comparison to its single-loop, single-path DT counterpart. |
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Keywords | Time-Interleaved, ΔΣ modulator, Signal-to-Noise Ratio. |
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Year | 2017 |
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Conference | First IEEE PhD Research in Microelectronics and Electronics Conference PRIME_LA |
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Publisher | IEEE |
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Accepted author manuscript | |
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Publication dates |
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Completed | 23 Feb 2017 |
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Published | 25 May 2017 |
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Book title | 2017 1st Conference on PhD Research in Microelectronics and Electronics Latin America (PRIME-LA) |
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ISBN | 9781509039630 |
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Digital Object Identifier (DOI) | https://doi.org/10.1109/PRIME-LA.2017.7899174 |
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