Impact of Bias Temperature Instability on Soft Error Susceptibility

Rossi, D., Omana, M., Metra, C. and Paccagnella, A. 2015. Impact of Bias Temperature Instability on Soft Error Susceptibility. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 23 (4), pp. 743-751.

TitleImpact of Bias Temperature Instability on Soft Error Susceptibility
AuthorsRossi, D., Omana, M., Metra, C. and Paccagnella, A.
Abstract

In this paper, we address the issue of analyzing the effects of aging mechanisms on ICs' soft error (SE) susceptibility. In particular, we consider bias temperature instability (BTI), namely negative BTI in pMOS transistors and positive BTI in nMOS transistors that are recognized as the most critical aging mechanisms reducing the reliability of ICs. We show that BTI reduces significantly the critical charge of nodes of combinational circuits during their in-field operation, thus increasing the SE susceptibility of the whole IC. We then propose a time dependent model for SE susceptibility evaluation, enabling the use of adaptive SE hardening approaches, based on the ICs lifetime.

KeywordsLogic gates, MOSFET, Integrated circuit modeling, Degradation, Aging, Threshold voltage
JournalIEEE Transactions on Very Large Scale Integration (VLSI) Systems
Journal citation23 (4), pp. 743-751
ISSN1063-8210
Year2015
PublisherIEEE
Accepted author manuscriptTVLSI-00281-2013-Final.pdf
Digital Object Identifier (DOI)doi:10.1109/TVLSI.2014.2320307
Publication dates
Published online13 May 2014
Published in printApr 2015
Published13 May 2014

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